Multicarrier modulation systems operate by dividing a serial data stream into several parallel component data streams, and transmitting each of these parallel data streams on separate subcarriers. At the receiving end, each of the parallel data streams is received, and arranged into a serial data stream corresponding with the serial data stream provided to the transmitter. Accordingly, in this type of system, only a small proportion of the total data is carried on each subcarrier.
While the power spectrum of each of the parallel data streams overlaps, communication is possible as the subcarriers are generally orthogonal with each other over a symbol period. This is a direct consequence of the use of orthogonal transforms in the transmitter and receiver respectively. Using an N-point transform (and thus providing N subcarriers) effectively increases the symbol period by a factor of N.
There are various design issues which limit the practical implementation of multicarrier modulation systems.
A design issue is to account for limitations due to arithmetic processing. Orthogonal frequency division multiplexing (OFDM) is the modulation technique used in many new and emerging broadband communication systems including wireless local area networks (LANs), high definition television (HDTV) and 4G systems.
The key component in an OFDM transmitter is an inverse discrete Fourier transform (IDFT) and in the receiver, a discrete Fourier transform (DFT). Usually, the transmitter performs an inverse DFT and the receiver a forward DFT. Some form of the fast Fourier transform algorithm (FFT) is usually used to implement the transforms.
The increasing computational power and performance capabilities of DSPs make them ideal for the practical implementation of OFDM functions. Consumer products are usually sensitive to cost and power consumption and for this reason, a fixed-point DSP approach is preferred. However, fixed-point systems have limited dynamic range, causing the related problems of round-off noise and arithmetic overflow.
In the majority of OFDM applications it is important to minimize the complexity of the signal processing. Depending on the application this may be to minimize the cost, to achieve high data rates or to reduce power consumption. As the IFFT and FFT operations are significant computationally intensive operations in the transmitter and receiver it is particularly important to optimize these functions. It should be noted that throughout this document reference to the term DSP (Digital Signal Processor) has only been used as an example, it could also be replaced by any processor, microprocessor, microcontroller, microcomputer, FPGA, CPLD, PLD, ASIC, sea of gates, programmable device, discrete logic chips, discrete analog, digital or passive components, or any other implementation technique useable with OFDM application.
There is already extensive literature on the FFT. However the requirements in OFDM are significantly different from those in most FFT applications. The key difference is that in OFDM it is the error over all outputs rather than the maximum error in each output which should be minimized. This has significant influence on FFT design.
The FFT is an algorithm for calculating the DFT. A number of different algorithms exist such as the decimation in time, decimation in frequency, radix 2, radix 4 etc. However they all use a butterfly structure. For a radix 2, at each butterfly, two inputs are multiplied by two twiddle factors and the sum and difference of the products are calculated.
The numbers within the FFT can be represented in either fixed point or floating point form. Floating point representation in general gives greater accuracy but fixed point implementation is often preferred in OFDM implementations because of its lower cost and power consumption. In fixed point implementations the bits often represent a fractional part and a sign bit, thus all numbers are scaled to be in the range ±1. In the following it is assumed (without loss of generality) that this is the case as it simplifies the explanation.
There are two mechanisms which may reduce the accuracy of representation at each arithmetic operation: truncation, for example using rounding, and saturation.
Saturation occurs when the result of a calculation is outside the range ±1. This can occur only as a result of the addition operation not of the multiplication operation, because the product of two numbers within the range ±1 also lies within the range ±1. The precise effect of saturation depends on the detail of how the summation is performed. It is important that the FFT is designed so that a value greater than +1 is set to 1 and less than −1 to −1. In other words the signal is ‘clipped’. Some arithmetic implementations such as 2's complement may result in ‘wrap-around’, so that a number greater than one is converted to a negative number and vice versa. One way to minimize or eliminate the probability of saturation is to scale the numbers so that they are well within the range ±1.
In contrast, truncation such as rounding occurs only as a result of the multiplication, not of the addition. When two b-bit numbers are multiplied, the result is 2b bits long and the least significant b bits are discarded. This contributes a small error at each butterfly. The size of this error relative to the wanted signal depends on the magnitude of the wanted signal, so to minimize the relative error the signals should be scaled to be as large as possible within the range ±1. Thus there is a conflict between minimizing the probability of saturation and minimizing the error due to truncation such as rounding.
The precise values of the signals within the FFT are unknown but the statistical properties of the signal can be calculated. The design problem is then to design the scaling so that there is the optimum trade-off between clipping and truncation such as rounding errors, given the statistical distribution of signals.
The traditional approach to FFT design is to scale the signal so that overflow is avoided. For OFDM systems using larger FFTs and fixed-point implementation, a large word length is required if rounding errors are not going to significantly degrade system performance. Scaling is usually distributed throughout the FFT structure as this reduces the overall effect of rounding errors. To completely eliminate the possibility of overflow in a radix-2 implementation, numbers must be scaled by a factor of one half after each butterfly stage. Another way to avoid overflow is to use Block Floating Point (BFP) scaling. This adapts the scaling at each stage of the FFT according to the data, so that overflow does not occur for the given input data. However a single large signal sample can result in scaling which causes large round off errors in all of the other signal values. To avoid this problem some researchers have proposed a compromise method called convergent BFP, where differing scaling factors are used for different sections of data.
It is an object of the invention to alleviate at least in part one or more of the problems of the prior art or at least provide an alternative approach. More particularly, embodiments of the invention attempt to provide a multicarrier modulation communication system which provides the option of using a lower number of bits in the DSPs for the IFFT and FFT operations of an OFDM system.